Altium

Design Rule Verification Report

Date: 2/7/2019
Time: 10:17:03 AM
Elapsed Time: 00:00:03
Filename: C:\Users\Jose\Desktop\DXP\DXP_2019\PAC5256EVK1_RevB\PAC5256EVK1_RevB.PcbDoc
Warnings: 0
Rule Violations: 0

Summary

Warnings Count
Total 0

Rule Violations Count
Clearance Constraint (Gap=78.74mil) (not InNetClass('HV_VAC2') and not InComponentClass('HV_Exclude')),(InNetClass('HV_VAC2') and not InComponentClass('HV_Exclude')) 0
Clearance Constraint (Gap=78.74mil) (not InNetClass('HV_VAC') and not InComponentClass('HV_Exclude')),(InNetClass('HV_VAC') and not InComponentClass('HV_Exclude')) 0
Clearance Constraint (Gap=68.898mil) (not InNetClass('HV_VBUS') and not InComponentClass('HV_Exclude')),(InNetClass('HV_VBUS') and not InComponentClass('HV_Exclude')) 0
Clearance Constraint (Gap=68.898mil) (not InNetClass('HV_W') and not InComponentClass('HV_Exclude')),(InNetClass('HV_W') and not InComponentClass('HV_Exclude')) 0
Clearance Constraint (Gap=68.898mil) (not InNetClass('HV_V') and not InComponentClass('HV_Exclude')),(InNetClass('HV_V') and not InComponentClass('HV_Exclude')) 0
Clearance Constraint (Gap=68.898mil) (not InNetClass('HV_U') and not InComponentClass('HV_Exclude')),(InNetClass('HV_U') and not InComponentClass('HV_Exclude')) 0
Net Antennae (Tolerance=0mil) (All) 0
Silk to Silk (Clearance=0mil) (All),(All) 0
Silk To Solder Mask (Clearance=0mil) (IsPad),(All) 0
Minimum Solder Mask Sliver (Gap=0mil) (All),(All) 0
Hole To Hole Clearance (Gap=8mil) (All),(All) 0
Hole Size Constraint (Min=12mil) (Max=246mil) (All) 0
Height Constraint (Min=0mil) (Max=99999mil) (Prefered=500mil) (All) 0
Width Constraint (Min=6mil) (Max=100mil) (Preferred=10mil) (All) 0
Power Plane Connect Rule(Relief Connect )(Expansion=20mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (All) 0
Clearance Constraint (Gap=8mil) (All),(All) 0
Un-Routed Net Constraint ( (All) ) 0
Short-Circuit Constraint (Allowed=No) (All),(All) 0
Minimum Annular Ring (Minimum=5mil) (All) 0
Clearance Constraint (Gap=49.213mil) (not InNetClass('HV_VM') and not InComponentClass('HV_Exclude')),(InNetClass('HV_VM') and not InComponentClass('HV_Exclude')) 0
Total 0