July 20, 2023

    New semiconductor switch technologies arrive occasionally, but every so often, they can have seismic impacts when they hit the market. Device technologies using wide band-gap materials, like silicon carbide (SiC) and gallium nitride (GaN), have certainly done that. These wide band-gap technology materials provide step improvements in power conversion efficiency and size reduction compared with traditional silicon-based part offerings.

    With the new ability of size reduction using SiC, Qorvo’s SiC-FET technology has extended its lead in developing a 750V device with a TO-Leadless (TOLL) package. So, what does one get in such a small TOLL package, and how does it benefit your design? That is exactly what we will be digging into below.

    The Packing Factor

    Compared with TO-247 and D2PAK, the TOLL package is 30% smaller in volume and half the height at 2.3 mm. Therefore, in regard to size, it beats the TO-247 and D2PAK standard packages by a large margin. Beyond these qualities, Qorvo’s SiC-FETs offer additional key elements contributing to the overall customer final design. Let’s outline these below.

    The Tradeoffs

    As with any semiconductor technology, there are always parameter tradeoffs that design engineers must consider when creating their applications. The best any design engineer can hope for is an optimal middle ground. It’s a fact that Qorvo’s SiC-FETs have the lowest RDS(ON) in the industry. This Low RDS(ON) allows for a high current rating using a smaller package. So, with this size reduction—we can put a 750 V SiC-FET inside a TOLL package.


    Learn More

    See how the high-performance 5.4 mohm 750V SiC FET in a TOLL package is perfect for small applications.

    Watch the Video

    RDS(ON) Versus Efficiency:

    • All FETs have some amount of power loss during conduction. The power losses during conduction are directly proportional to the RDS(ON) rating. This loss equates to a decrease in system efficiency. Typically, to attain a lower RDS(ON), one needs to increase the size of the FET—which equates to lower conduction loss and a larger size semiconductor. See below in Figure 1. By increasing the FET size, you also increase costs and switching losses. Clearly, a tradeoff exists between cost and RDS(ON). In the case of Qorvo’s SiC-FET, this tradeoff is minimized because the overall size of the component is much smaller than competing SiC, Si, or GaN power technologies. See Figure 3, left graph.

      Figure 1: Tradeoffs between RDS(ON) and Eon and Eoff.


    • As shown above, not only are there tradeoffs between RDS(ON) and size, but there are tradeoffs between switching energy and RDS(ON). As you increase the device RDS(ON), the switching energy (Eon and Eoff) increases. So, as you move toward the lower RDS(ON) and conduction loss—you increase Eon and Eoff switching losses. The tradeoff between these two parameters is more of a challenge in hard switching applications like EV DC/AC converters or Power Factor Correction (PFC) solutions—but ultimately, by balancing between these two parameters, an optimized outcome is achievable. Comparing this figure-of-merit tradeoff of Qorvo’s SiC-FETs to other power technologies, the competition is mostly equal.

    RDS(ON) versus FET Output Capacitance:

    • In soft-switching applications like DC/DC EV converters, there is a tradeoff between RDS(ON) and the Coss(tr) or FET output capacitance (tr—meaning time-related). See the graph below . As you move toward a lower RDS(ON) device, the Coss(tr) increases. The Coss(tr) is a key factor determining the operating frequency of the FET in soft switch applications. The lower the Output Capacitance, the higher the operating frequency can be achieved. In soft-switching applications, one will need to choose between these two parameters to ensure an optimal operating frequency of their system is achieved. This being said, as shown on the right side of Figure 3, you can see that Qorvo’s SiC-FET technology has a lower overall RDS(ON) for a given Coss(tr). Making Qorvo SiC-FETs technology more favorable in many soft-switching applications.


    Figure 2: Tradeoffs between RDS(on) and Coss(tr).


    Looking at these combined tradeoffs and the competition, as shown in the below image—one can see the lower RDS(ON) provides large benefits in both hard and soft switching scenarios—but a larger benefit in soft switching for sure.


    Figure 3: Comparing SiC technologies in 650 and 750 V classes at 25°C and 125°C.


    When it comes to comparing with Si MOSFETs—in soft-switching applications, the Qorvo SiC-FET has lower conduction losses and higher operating frequency—and the additional lower switching losses in hard-switching applications. When comparing with other SiC technologies on the market—Qorvo SiC-FETs provide a higher operating frequency and lower conduction loss.

    When looking at the market players in regard to their TOLL packaged offerings, one can see the other players lag in both voltage class and in RDS(ON). This is due to Qorvo’s SiC-FET technology’s best-in-class specific on-resistance—which means one can use a smaller package type and still achieve the lowest total resistance. The figure below shows the comparison, both at 25°C and 125°C for a SiC FET from Qorvo, part UJ4SC075005L8S and other current best-in-class TOLL packaged devices, Si MOSFETs, GaN HEMT cells and SiC MOSFETs.


    Figure 4: On-resistances compared for switches in TOLL packages, 600-750 V class at 25°C and 125°C.


    Yes, the scale is correct—the SiC FETS are 4x better than the nearest providers and around 10x better than GaN offered in the TOLL package! It is also important to note that the SiC FET is 750 V-rated and has a robust avalanche characteristic. The other devices are only 600/650 V rated, and the GaN HEMT cell has no avalanche rating.

    The benefits, as described above, along with a higher voltage-rated switch in a smaller TOLL package, means more bang for your cost.

    The Application Sweet Spots

    The focus applications for a SiC-FET power switch in a TOLL package would be where power density is key, in a range of a few hundred watts to greater than 10’s of Kilowatts. This would include switched mode power conversion in TVs, battery chargers and portable power stations, as well as power supplies in datacomms and solar and energy storage inverters. Operating as circuit breakers, the devices will find use in building electrical panels and in EV chargers.

    In many of these applications, space is at a premium, and the TOLL-packaged SiC FET is a cost-effective solution compared to the other suppliers. These TOLL-packaged SiC-FETs fit in the space available and require less costly heatsinking. Moreover, with the leadless arrangement and Kelvin connection, it minimizes connection inductance, allowing for fast switching with low dynamic loss.

    Check out our large package portfolio here and use our free online FET-Jet Calculator to assist you with your most recent design.

    David Schnaufer

    About the Author

    David Schnaufer
    Technical Marketing Communications Manager

    David is the public voice for Qorvo’s applications engineers. He provides technical insight into RF trends as well as tips that help RF engineers solve complex design problems.