| Power Supply Input Voltage(V) | 5.2 to 72 |
| Power Supply Topology | 72 V Buck |
| Gate Drivers (High-Side) | 3 @ 72 V - 1.2 A Source / 1.8 A Sink |
| Gate Drivers (Low-Side) | 3 @ 20 V - 1.2 A Source / 1.8 A Sink |
| Gate Drivers (Open-Drain) | N/A |
| Microcontroller | 150 MHz ARM® Cortex®-M4F |
| MCU Flash(KB) | 128 |
| MCU SRAM(KB) | 32 |
| MCU ADC | 12-bit 2.5 MSPS SAR |
| MCU PWMs | 31 |
| Serial Interfaces | UART/SPI, I2C, CAN |
| Signal Chain Diff Amps | 3 |
| Signal Chain Single Amps | 4 |
| Signal Chain ADC Channels | 14 |
| Package Type | TQFN, 64-pin |
| Package(mm) | 9.0 x 9.0 |
| RoHS | Yes |
| Lead Free | Yes |
| Halogen Free | Yes |
| ITAR Restricted | No |
| ECCN | EAR99 |
Qorvo's PAC55724EVK1 development platform is a complete hardware solution enabling users, not only to evaluate the PAC55724 device, but also develop power applications revolving around this powerful and versatile ARM® Cortex®-M4F based micro-controller. The module contains a PAC55724 Power Application Controller (MCU) and its internal peripherals, including new features such as Cycle By Cycle PWM truncation, AIO7/8/9 Sample And Hold, Windowed Watchdog Timer, enhanced gate drive strength, as well as enhanced low Hibernate current.
To aid in the application development the PAC55724EVK1 offers access to each and every one of the PAC55724 device's signals by means of a series of female header connectors.
The PAC55724EVK1 can be used with various Graphical User Interface (GUI) software suites to externally control particular application features over the PAC55724 UART interface. Provided with the development platform, the ET-UARTSWD module adds fully isolated USB to UART Virtual COMM Port, as well as access to the PAC55724’s SWD port through a fully isolated bidirectional channel which allows most SWD program/debug modules to interconnect with the system.